Project Overview
MicroNAS combines Differentiable Neural Architecture Search (DNAS) with lookup-table-based latency estimation and a custom search space optimized for time series data. The framework introduces two specialized building blocks — Time-Reduce and Sensor-Fusion cells — that efficiently extract temporal and cross-sensor features while minimizing computational cost.
This approach allows MicroNAS to design neural networks that are tailored to specific microcontroller architectures and capable of operating within user-defined hardware limits. The system has been evaluated on multiple benchmark datasets and demonstrated its ability to produce compact, high-performance models suitable for real-time execution on embedded platforms such as the STM32 Nucleo-L552ZE-Q and Arduino Portenta H7.
Our Goal
The goal of MicroNAS is to automate the design of neural networks for highly resource-constrained devices, ensuring optimal trade-offs between accuracy, latency, and memory consumption. By enabling real-time, on-device learning for time series data, MicroNAS supports the next generation of privacy-preserving, energy-efficient TinyML applications in areas such as wearables, IoT, and edge computing.
